Home | Yihan Zhang

Hardware Engineering for the Next Generation

In the past decades, Moore’s Law guided the semiconductor industry with its prediction of a steady growth in computing power at a fixed unit cost. However, in recent years, this stability has started to decline. While smaller and more efficient transistors will continue to emerge, each step toward miniaturization requires new device structures and materials. From high-k metal gate (HKMG) and FinFET to gate-all-around (GAA) and complementary FET (CFET) in the future, each advancement encounters novel uncertainties, especially when compared to the golden days of Dennard scaling, that allows us to rely on yearly improvements in electronics.

Aware of the potential economic impact of this decreasing stability, I have directed my research on a “more-than-Moore” approach. Although the golden era may have passed, it left us with a range of compact and energy-efficient transistors for information processing. I concentrate my current research on circuits operating in the nW/sub-nW range, tapping into their significant potential to function under innovative power sources. In other words, I aim to apply my integrated circuit (IC) engineering skills to make the unseen useful. I hope my research path will help the IC industry find a new way to achieve stable growth again.

We Are Hiring!

For 2024 Spring and Fall Enrollment, we still have the following openings:

Ph.D. position: We have one position available, for a candidate who satisfies the one of the following criteria:

Has a master’s degree in integrated circuit design, or
Has a bachelor’s degree in physics with a reasonable background knowledge in analog & digital circuit design. Decisions are based on interview results only. If you are interested in, please send me an email.

Postdoc position: We have 1-2 positions available. Please send me your CV. Postdoc offers are highly dependent on your past research experience and skill set.

Research Directions

Towards Novel Applications

— Exploring the potential beheld by ultra-low-power circuits.

Augmented Ultrasonography with Implanted CMOS Electronic Motes:

Demonstrating how imaging process can also deliver power, at nW-level!
Showcasing how sub-nW circuits can harvest this energy and create new vehicles for retrieving information within our body.
The complete idea is published in Nature Communications.
A more detailed circuit paper is available in 2019 Custom Integrated Circuit Conference.

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The proposed concept is implemented in custom-designed extremely low power integrated circuits (sub-nW regime)
Simultaneous, digital, bi-directional datalinks for multiple implants thanks to B-mode’s spatial polling mechanism
Multi-disciplinary engineering efforts including IC design, package design, image processing algorithm design, etc.
In vivo verification with mouse
… and my years of effort!

Expanding the Sub-nW Ecosystem

— Extending the capability of sub-nW circuit and systems.

0.72 nW Fully Integrated pH Sensor

Exploring sensing possibility in the sub-nW kingdom.
Demonstrating an analog signal chain, from chemical signal all the way to digital, in just 0.72nW of power.
Circuit published in 2020 IEEE Symposium on VLSI Circuits.

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Full-stack engineering efforts from device fabrication to software design.
65.8 LSB/pH from on-chip pH sensing site to digital data interface.
Easy to use with a total of 8 pins: VDD, VSS, and 6 digital signal pins.
Designed towards sub-nW electrochemical sensing.

0.663 nW Low Leakage 6T-SRAM Macro at 256 kb Capacity (2.53 fW/bit)

Exploring how much we can remember in the sub-nW regime.
Demonstrating an SRAM array with fW/bit-level leakage, while operating at MHz-speed.
Circuit published in 2022 IEEE International Solid-State Circuit Conference

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Proposed SRAM macro topology achieves extremely low leakage, high density, and fast operation all at once, with verifications done across technology nodes (180nm & 55nm).
Easy to use with a single external supply and a single operation mode.
State-of-the-art performance: 2.53fW/bit & 1.16MHz (180nm) and 55.2fW/bit & 17.6MHz (55nm).
Designed towards sub-nW digital processing.

0.954 nW Low Power 32.768 kHz Crystal Oscillator

Exploring accurate time-keeping in the sub-nW regime.
Demonstrating an 32.768kHz crystal oscillator with state-of-the-art accuracy and low power.
Circuit published in 2023 IEEE International Solid-State Circuit Conference

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Under construction

Selected Publications

Y. You, R. Tian, Y. Zhang, Z. Chen, W. Lu, and Y.Zhang, “A 15.7-V-Compliant 86% Peak Efficiency Current-Mode Stimulator with Dynamic Voltage Supply for Implantable Medical Devices”, 2023 IEEE European Solid-State Circuit Conference (ESSCIRC), Sep. 2023.
Y. You, K. Ma, R. Tian, Y. Zhang, Z. Chen, and Y. Zhang, “A 10-bit 15 V-Compliant Bi-Phasic Current-Mode Vagus Nerve Stimulation Circuit in 180 nm BCD Technology”, 2023 International Symposium on Circuit and Systems (ISCAS), May. 22, 2023.
Y. Zhang, Y. You, W. Ren, X. Xu, L. Shen, J. Ru, R. Huang, and L. Ye, “A 0.954nW 32kHz Crystal Oscillator in 22nm CMOS with Gm-C-Based Current Injection Control,” in 2023 IEEE International Solid-State Circuit Conference (ISSCC), pp. 68-69, Feb. 20, 2023
Y. Zhang, P. Muthuraman, V. Andino-Pavlovsky, I. Uguz, J. Elloian, and K. L. Shepard, “Augmented Ultrasonography with Implanted CMOS Electronic Motes,” in Nature Communications, 13, 3521, 2022.
X. Xu, S. Ye, J. Gao, Y. Zhang, L. Shen, and L. Ye, “A 32-ppm/^oC 0.9-nW/kHz Relaxation Oscillator with Event-Driven Architecture and Charge Reuse Technique,” in 2022 International Symposium on Circuit and Systems (ISCAS), Jun. 1, 2022.
C. Xue, Y. Zhang, P. Chen, M. Zhu, T. Wu, M. Wu, Y. He, and L. Ye, “Reliability-Improved Read Circuit and Self-Terminating Write Circuit for STT-MRAM in 16 nm FinFET”, in 2022 International Symposium on Circuit and Systems (ISCAS), May. 31, 2022.
Y. Zhang, C. Xue, X. Wang, T. Liu, J. Gao, P. Chen, J. Liu, L. Sun, L. Shen, J. Ru, L. Ye, and R. Huang, “Single-Mode 6T CMOS SRAM Macros with Keeper-Loading-Free Peripherals and Row-Separate Dynamic Body Bias Achieving 2.53fW/bit Leakage for AIoT Sensing Platforms,” in 2022 IEEE International Solid-State Circuit Conference (ISSCC), pp. 184-186, Feb. 20, 2022
Y. Zhang, F. A. Cardoso, and K. L. Shepard, “A 0.72 nW, 1 Sample/s Fully Integrated pH Sensor with 65.8 LSB/pH Sensitivity,” in 2020 IEEE Symposium on VLSI Circuits, Jun. 15, 2020
W-C. Cornell, Y. Zhang, A. Bendebury, A. J. W. Hartel, K. L. Shepard, and L. E. P. Dietrich, “Phenazine Oxidation by a Distal Electrode Modulates Biofilm Morphogenesis,” in Biofilm, vol. 2, May. 2020 (co-first author)
C. Shi, T. Costa, J. Elloian, Y. Zhang, K. L. Shepard, “A 0.065-mm³ monolithically-integrated ultrasonic wireless sensing mote for real-time physiological temperature monitoring,” in IEEE Transactions on Biomedical Circuits and Systems, vol. 14, no. 3, pp. 412-424, Jun. 2020
Y. Zhang and K. L. Shepard, “A 0.6-mm² Powering and Data Telemetry System Compatible with Ultrasound B-Mode Imaging for Freely Moving Biomedical Sensor Systems,” in 2019 Custom Integrated Circuit Conference, Apr. 16, 2019
H. Sakhtah, L. Koyama, Y. Zhang, D. K. Moralesa, B. L. Fields, A. Price-Whelan, D. A. Hogan, K. L. Shepard, and L. E. P. Dietrich, “The Pseudomonas aeruginosa efflux pump MexGHIOpmD transports a natural phenazine that controls gene expression and biofilm development,” Proceedings of the National Academy of Sciences (PNAS), vol. 113, no. 25, E3538-E3547, Jun. 6, 2016
D. L. Bellin, H. Sakhtah, Y. Zhang, A. Price-Whelan, L. E. P. Dietrich, and K. L. Shepard, “Electrochemical camera chip for simultaneous imaging of multiple metabolites in biofilms,” in Nature Communications, 7, 10535, 2016